TrueDigital PLL

All-Digital PLLs Deliver Unrivaled Power Savings

TrueDigital PLL (phase-locked loop) modules are available for select applications requiring a simple drop-in replacement for analog PLL functionality.

All digital and fully synthesizable, TrueDigital PLLs deliver superior performance, power, and area compared to traditional analog and partial-digital solutions. Satisfying requirements ranging from ultra-low power nanowatt to high performance multi-GHz, these PLLs can be customized in weeks. TrueDigital PLLs do not require the precise voltage or current biasing that analog PLLs do. This enables support for low power consumption. Because they are not dependent on the matching and passive elements required for analog implementations, TrueDigital PLLs can be 10 times smaller in area than their analog counterparts.

Today, analog PLLs are widely used in SoCs for frequency synthesis. With analog PLLs designers are typically forced to adapt their SoCs to off-the-shelf PLLs. This causes lengthy design cycles. The worst problem with one-size-fits-all PLLs is that they often leave performance on the table. TrueDigital PLLs enable designers to reclaim significant performance gains and power savings.

Application-optimized to exact specifications, TrueDigital PLLs can be used in edge AI, IoT, high-performance cloud, and aerospace SoCs. They are silicon-proven across foundries including TSMC, GF, UMC, Fujitsu, and are commonly used by customers in volume production. They can also support implementation for non-standard process nodes in a fraction of the time of analog PLLs.

Product Line Highlights
Customizable in Weeks Fully synthesizable architecture speeds implementation
Wide Voltage & Frequency Range Enables reduced chip power consumption
Nanowatt Power Does not require precise voltage or current biasing
Up to 10X Smaller Area Not dependent on matching and passive elements
Sub-Picosecond Jitter Higher level of noise immunity than analog
Rad-Hardened Designs Radiation-hardened using existing digital libraries
Process Node Independent Supports processes from all foundries
Leverages Existing Tools Uses existing digital tools and methodologies

Key Features

  • Flexible architecture with integer-N, fractional-N & spread-spectrum clocking
  • Reference divider range 1-512, Output divider range 1-512, Feedback divider range 1-1024
  • Dynamic loop filter for fast locking with bandwidth as high as Fref/15 and as low as 10 kHz
  • PLLs programmable through a parallel bus or a serial bus with lock status bit available
  • Ultra low voltage operation with no headroom limitation resulting in low voltage operation
  • Extreme environment operation for extended temperatures and radiation hardness