Knowledge Center

Whitepapers

Preview	Title	Resource Type	Summary
	Movellus Aeonic: An Intelligent Clock Network	Whitepaper, 8 pages	Movellus is increasing silicon clock performance, power, and reliability through its Aeonic technology, which uses optimized IP to mitigate on-chip variation, skew, and voltage droop for high-performance and low-power devices. Authored by The Linley Group Click here to download the white paper!

Use Cases

Preview	Title	Resource Type	Summary
	Distributed Clocking for Sea of Processor SoCs	Use Case Summary, 2 pages	Learn more about how Aeonic Generate CGMs and distributed clocking enables fine-grain performance tuning for sea of processor architectures. Click here to download the paper!

Product Briefs and Data Sheets

Preview	Title	Resource Type	Summary
	Aeonic Platform Solution Overview	Platform Overview, 2 pages	50-75% power reduction vs mesh networks 25% faster timing closure Run-time compensation for static and dynamic silicon Active droop response Industry leading area for clock generation Click here to download the platform solution overview!
	Aeonic Generate AWM Data Sheet	Data Sheet, 4 pages	Up to 8x smaller than analog PLLs Eight unique clock outputs Fast frequency switching times Core-voltage supply Process portable Click here to learn more about the Aeonic Generate AWM!
	Aeonic Generate CGM Data Sheet	Data Sheet, 4 pages	Up to 8x smaller than analog PLLs Low-power Core-voltage supply Process portable Click here to learn more about the Aeonic Generate CGM!
	Aeonic Connect Product Brief	Product Brief, 2 pages	Dynamic compensation Process portable 50-75% power savings over a mesh network 25% faster timing closure Click here to learn more about Aeonic Connect!