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Movellus Secures $23M Series B "We are extremely grateful to have MESH and SK hynix join our existing investors in this round, and welcome Edward Chyau and Heejin Chung to the board. We were able to close the round with a significant step up in valuation in a challenging economic environment, and SK hynix’s strategic investment is a strong endorsement in our technology and long-term strategy."

- Mo Faisal CEO and Founder
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Building Foundry Ecosystems "Building the future requires software, tools and products, and it also requires funding. Early this year, Intel launched the $1 billion IFS Innovation Fund to support early-stage startups and established companies building disruptive technologies for the foundry ecosystem. Today, the company announced the first round of companies that have received funding, a diverse group innovating across the entire semiconductor stack"

- Intel Innovation 2022
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Aeonic Intelligent Clock Networks Aeonic generates and delivers an application-optimized intelligent clock network through the Aeonic Generate™ and Aeonic Connect™ product families. It uses a dynamically compensating clock network to lower power consumption and simplify timing closure. The platform is in use by an array of applications ranging from ultra-low power edge AI devices to performance-centric cloud datacenter compute and AI offerings. learn more

Movellus Aeonic™ Digital IP Platform

Architectural Solutions for Complex SoCs

Movellus Aeonic™ IP delivers chip-level architectural
innovations to improve system performance through feature-rich, synthesizable IP.

Movellus Aeonic is an IP platform that solves system-level issues through first principles. The foundation of the Aeonic platform is Movellus’ core expertise in converting traditionally analog functions into the digital domain and combining this with system-level knowledge to solve challenging SoC problems in innovative ways with process portable solutions.

Movellus Aeonic is a configurable platform that helps architects address challenges faced in advanced silicon designs, such as droop response, fine-grain performance tuning, and latency.

  • “We knew that we that had to design neural processors with not only exceptional performance, but with chips that achieve that performance at very low power and in a very small die area. Therefore, choosing the right IP partner critical for us. We put our trust in Movellus because their clock generation and CGM solutions fit our low-power architecture perfectly. They proved to be the right choice. In addition, to the architectural fit, their support from their application team helped us meet the very tight timelines we had set for introducing our solution to the market. That is the reason we continue to work with Movellus and as we work to expand our award-winning portfolio of neural decision processor for edge AI.”

    David Garrett

    Chief Architect and SVP Engineering
  • Movellus’ clocking solution had the smallest area for the frequency and process combination – no other vendor came close.

    Dr. Nathan Roberts

    VP of Engineering at Everactive Technologies
  • "With a chip that has over 1000 RISC-V processors that are running at extremely low power levels, clocking was one of the more important design considerations for this project. We work directly with the Movellus engineering team to design and debug this innovate clock distribution network. Their CGM and AWM solutions really helped us to achieve our aggressive performance targets while keeping the power within our budget."

    Darren Jones

    Vice President VLSI Engineering

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