Aeonic Generate™
Synthesizable Clock Generation Solutions
Synthesizable Clock Generation for Complex SoCs
Aeonic™ Generate clock IP modules are purpose-built for SoCs in applications ranging from datacenter CPUs and AI accelerators, to 5G, aerospace, and automotive SoCs that require higher degrees of testability, and reliability. The Aeonic Generate family spans extremely area efficient clock generation solutions enabling uses such as distributed clocking to the industry’s first integrated droop response system. The Aeonic Generate product family features high degrees of observability for monitoring, operating from core VDD supply for simplified integration, and 8x smaller area than other fractional PLLs.
Key Benefits
Observable
- IP that generates rich outbound data
- Common interfaces for silicon health and analytics management
- Programmable to adapt to silicon variation
Synthesizable
- Enables feature-rich IP for system-level solutions
- Up to 10x smaller than analog solutions
- High scan coverage for high-reliability applications
Process Portable
- Features that reliably port and scale from node-to-node
- Long-term R&D leverage
- Scales with process technology
Aeonic Generate Product Family
- Extremely fast time to adapt (detect + respond) for droop with fine-grained clock speed control
- Rapid response time for DFS/DVFS control
- Comprehensive droop and clock health telemetry
- Programmable droop response and recovery profile
- Run-time programmability
- Synthesizable
- 8x smaller than fractional analog PLLs
- Run-Time Programmable
- Synthesizable
- Harsh-Environment Ready
With our partner foundries and radiation-hardened library vendors, aerospace customers can create customized radiation tolerance levels. OEMs can deploy generation modules to various radiation-challenged environments, such as low-earth or geosynchronous orbit.
Aeonic clock generation modules are silicon-proven across leading foundries, including TSMC, Intel, Global Foundries, and UMC, and are in use across multiple high-volume products.