Digital Clock Generation Modules Designed from the Ground up for SoCs
Clock Generation Modules Reduce Area by 10x
Maestro™ clock generation modules are purpose-built for SoCs in applications ranging from datacenter CPUs and AI accelerators, to 5G, aerospace, and automotive SoCs that require higher degrees of testability, reliability, and area-flexibility.
The clock generation modules are fully synthesizable resulting in a 10x area improvement over analog PLLs and scale with process technology. These digital clock generation modules improve testability (up to 98% coverage) for applications ranging from aerospace to functional safety for automotive.
With our partner foundries and radiation-hardened library vendors, aerospace customers can create customized radiation tolerance levels, and OEMs can deploy generation modules to various radiation challenged environments, such as low-earth or geosynchronous orbit.
Maestro clock generation modules are silicon-proven across leading foundries, including TSMC, Intel, Global Foundries, and UMC, and are in use across multiple high volume products.
Product Line Highlights
- Flexible architecture with integer-N, fractional-N & spread-spectrum clocking
- Reference divider range 1-512, Output divider range 1-512, Feedback divider range 1-1024
- Dynamic loop filter for fast locking with bandwidth as high as Fref/15 and as low as 10 kHz
- Programmable through a parallel or serial bus with a lock status bit
- Ultra low voltage operation with no headroom limitation resulting in low voltage operation
- Extreme environment operation for extended temperatures and radiation hardness