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Foundations of Power Management in the Age of AI
In an AI datacenter, 50 mV of voltage margin can be worth about 270 racks of compute per gigawatt of input electricity. This whitepaper distills a systematic approach to power management into four axioms for recovering that margin and maximizing compute density.
SoC Power Delivery Network (PDN) Telemetry and Applications
PDN characterization needs visibility at the transistor. Through this whitepaper, we will learn why PDN visibility is crucial to each stage of the silicon lifecycle and its relation to power, performance, and in-field uptime.
Introduction to Voltage Droop and Mitigation Techniques
Voltage droop is a growing issue in high-performance SoCs. Through this whitepaper, we will learn how different voltage droop profiles affect the ability to mitigate. We also will spend time quantifying the voltage savings across different droop mitigation systems.
Enhancing System Observability: Integrating Real-Time Voltage Telemetry and Functional Monitoring for Deeper Insights
Modern AI SoCs push power delivery networks to their physical limits, yet traditional monitoring leaves a visibility gap. This joint white paper from Siemens EDA and Movellus shows how hardware cross-triggering links Aeonic Insight™ voltage telemetry with Tessent™ Embedded Analytics functional monitoring for a single, time-aligned view of what happened and why.
Movellus Attacks Voltage Droop
Movellus debuts its Aeonic™ Integrated Droop Response System that takes critical steps in mitigating an issue that is affecting an increasing number of chips. Authored by Bryon Moyer at Techinsights.
Synchronous Die-to-Die Signaling Using Aeonic Connect
Presented at CICC 2023, Movellus explores a single-cycle die-to-die solution that is 3-5x lower power than existing standards.
Aeonic Insight™ PDN IQ Product Brief
Features include transistor-level PDN visibility, PDN telemetry and onboard analytics across silicon lifecycle, programmable look-behind buffer, cross-trigger matrix interface, and process portability.
Aeonic Power™ HC Solution Brief
Enables per-core DVFS, programmable through standardized interfaces, localized IR drop mitigation, virtual power islands, and process portable functionality.
Aeonic Power™ LN Solution Brief
Eliminates inductive filters, isolates die-to-die rails, simplifies PDN, includes telemetry, virtual power islands, and process portable features.
Aeonic Generate™ AWM3 Solution Brief
Offers <2 cycle droop response, enables distributed and localized clocking, operates on core voltage without VDDA, includes telemetry, post-silicon programmability, and process portability.
Aeonic Generate™ CGM Solution Brief
Enables distributed and localized clocking, operates on core voltage without VDDA, includes telemetry, post-silicon programmability, and process portable design.
Aeonic Insight™ Droop Detector Solution Brief
Provides in-test and in-field PDN monitoring, multi-threshold droop detection, telemetry, automated calibration, industry-leading response time, and process portability.
Aeonic™ Integrated Droop Response Solution Brief
Reduces chip-level Vmin, enables single-cycle droop detection and response, includes multi-threshold detection, post-silicon programmability, and droop-specific telemetry.
Movellus Aeonic: An Intelligent Clock Network
How the Aeonic platform delivers adaptive, intelligent clocking across the entire SoC - from concept to silicon.
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