Movellus PLL, DLL and LDO IP Product Families. Movellus 100% Digital IP offer the same precision, performance, and power advantages of the equivalent analog IPs, while fully leveraging the time-to-market and process portability benefits of a true digital implementation.
Movellus PLL-, DLL-, and LDO Generators. Movellus IP Generators expand companies’ existing automated digital design and verification tools to deliver optimized and process-portable IPs in hours — replacing months-long analog design methods.
Following the installation of Movellus’ IP generator software , digital designers implement Movellus IP in the same manner as with other digital IP.
The engineers input their parameters into their existing digital tools using the digital user interfaces, and then verify the IP utilizing existing RTL simulators.
Movellus PLL IP & PLL Generator
Movellus’ silicon proven PLL generator & PLL IP covers a wide range of applications from general purpose clocking to deskew and high performance PLLs. Our PLL is currently being utilized in a wide range of applications from AI chips to ultra low power IoT chips.
Movellus DLL IP & DLL Generator
Movellus DLL generator and DLLs cover a variety of applications from IO deskewing to DDR. Our DLLs are implemented completely using digital design & verification flows. Unlike other digital DLLs, Movellus’ digital DLLs offer ultra fine delay control mitigating the quantization noise.
Availability: 2H 2018
Movellus LDO IP & LDO Generators
Movellus LDO Generators and LDOs are excellent candidates for complex SoCs with heterogeneous voltage domains. Our LDOs are completely implemented using digital circuits in the digital domain. Therefore, eliminating the integration overhead typically associated with custom designed LDOs.
Availability: 2H 2018
“Mythic delivers AI that performs hybrid digital/analog calculations inside flash arrays, resulting in orders of magnitude increase in efficiency,” said “The Movellus PLL Generator has unique IP and software technology that expands existing digital tools to enable them to automatically generate PLLs, eliminating manual analog design methods.
“Their generator allowed us to focus on designing our SoC without worrying about any schedule slips due to late manual analog customizations needed to meet our goals; for example, when we needed to push a metal stack change, Movellus was able to provide a correct IP in a matter of hours.”
– Dr. David Fick, CTO, Mythic